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authorLen Brown <len.brown@intel.com>2017-01-31 23:07:49 -0500
committerLen Brown <len.brown@intel.com>2017-03-01 00:14:20 -0500
commit31e07522be566cd039ff7a770550076cc1707a0c (patch)
tree8841bd6ebbe54fcc5464193ad99c37dc7773c282
parent34c7619762f7b4ebbd5157b312e6022b725c031e (diff)
tools/power turbostat: fix decoding for GLM, DNV, SKX turbo-ratio limits
Newer processors do not hard-code the the number of cpus in each bin to {1, 2, 3, 4, 5, 6, 7, 8} Rather, they can specify any number of CPUS in each of the 8 bins: eg. ... 37 * 100.0 = 3600.0 MHz max turbo 4 active cores 38 * 100.0 = 3700.0 MHz max turbo 3 active cores 39 * 100.0 = 3800.0 MHz max turbo 2 active cores 39 * 100.0 = 3900.0 MHz max turbo 1 active cores could now look something like this: ... 37 * 100.0 = 3600.0 MHz max turbo 16 active cores 38 * 100.0 = 3700.0 MHz max turbo 8 active cores 39 * 100.0 = 3800.0 MHz max turbo 4 active cores 39 * 100.0 = 3900.0 MHz max turbo 2 active cores Signed-off-by: Len Brown <len.brown@intel.com>
-rw-r--r--tools/power/x86/turbostat/turbostat.c90
1 files changed, 67 insertions, 23 deletions
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index 8c437115d41b..67a275882a8d 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -1671,56 +1671,84 @@ dump_ivt_turbo_ratio_limits(void)
1671 ratio, bclk, ratio * bclk); 1671 ratio, bclk, ratio * bclk);
1672 return; 1672 return;
1673} 1673}
1674int has_turbo_ratio_group_limits(int family, int model)
1675{
1676
1677 if (!genuine_intel)
1678 return 0;
1679
1680 switch (model) {
1681 case INTEL_FAM6_ATOM_GOLDMONT:
1682 case INTEL_FAM6_SKYLAKE_X:
1683 case INTEL_FAM6_ATOM_DENVERTON:
1684 return 1;
1685 }
1686 return 0;
1687}
1674 1688
1675static void 1689static void
1676dump_nhm_turbo_ratio_limits(void) 1690dump_turbo_ratio_limits(int family, int model)
1677{ 1691{
1678 unsigned long long msr; 1692 unsigned long long msr, core_counts;
1679 unsigned int ratio; 1693 unsigned int ratio, group_size;
1680 1694
1681 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr); 1695 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
1682
1683 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr); 1696 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
1684 1697
1698 if (has_turbo_ratio_group_limits(family, model)) {
1699 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
1700 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
1701 } else {
1702 core_counts = 0x0807060504030201;
1703 }
1704
1685 ratio = (msr >> 56) & 0xFF; 1705 ratio = (msr >> 56) & 0xFF;
1706 group_size = (core_counts >> 56) & 0xFF;
1686 if (ratio) 1707 if (ratio)
1687 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 8 active cores\n", 1708 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1688 ratio, bclk, ratio * bclk); 1709 ratio, bclk, ratio * bclk, group_size);
1689 1710
1690 ratio = (msr >> 48) & 0xFF; 1711 ratio = (msr >> 48) & 0xFF;
1712 group_size = (core_counts >> 48) & 0xFF;
1691 if (ratio) 1713 if (ratio)
1692 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 7 active cores\n", 1714 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1693 ratio, bclk, ratio * bclk); 1715 ratio, bclk, ratio * bclk, group_size);
1694 1716
1695 ratio = (msr >> 40) & 0xFF; 1717 ratio = (msr >> 40) & 0xFF;
1718 group_size = (core_counts >> 40) & 0xFF;
1696 if (ratio) 1719 if (ratio)
1697 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 6 active cores\n", 1720 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1698 ratio, bclk, ratio * bclk); 1721 ratio, bclk, ratio * bclk, group_size);
1699 1722
1700 ratio = (msr >> 32) & 0xFF; 1723 ratio = (msr >> 32) & 0xFF;
1724 group_size = (core_counts >> 32) & 0xFF;
1701 if (ratio) 1725 if (ratio)
1702 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 5 active cores\n", 1726 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1703 ratio, bclk, ratio * bclk); 1727 ratio, bclk, ratio * bclk, group_size);
1704 1728
1705 ratio = (msr >> 24) & 0xFF; 1729 ratio = (msr >> 24) & 0xFF;
1730 group_size = (core_counts >> 24) & 0xFF;
1706 if (ratio) 1731 if (ratio)
1707 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n", 1732 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1708 ratio, bclk, ratio * bclk); 1733 ratio, bclk, ratio * bclk, group_size);
1709 1734
1710 ratio = (msr >> 16) & 0xFF; 1735 ratio = (msr >> 16) & 0xFF;
1736 group_size = (core_counts >> 16) & 0xFF;
1711 if (ratio) 1737 if (ratio)
1712 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n", 1738 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1713 ratio, bclk, ratio * bclk); 1739 ratio, bclk, ratio * bclk, group_size);
1714 1740
1715 ratio = (msr >> 8) & 0xFF; 1741 ratio = (msr >> 8) & 0xFF;
1742 group_size = (core_counts >> 8) & 0xFF;
1716 if (ratio) 1743 if (ratio)
1717 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n", 1744 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1718 ratio, bclk, ratio * bclk); 1745 ratio, bclk, ratio * bclk, group_size);
1719 1746
1720 ratio = (msr >> 0) & 0xFF; 1747 ratio = (msr >> 0) & 0xFF;
1748 group_size = (core_counts >> 0) & 0xFF;
1721 if (ratio) 1749 if (ratio)
1722 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active cores\n", 1750 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
1723 ratio, bclk, ratio * bclk); 1751 ratio, bclk, ratio * bclk, group_size);
1724 return; 1752 return;
1725} 1753}
1726 1754
@@ -2597,7 +2625,7 @@ int is_skx(unsigned int family, unsigned int model)
2597 return 0; 2625 return 0;
2598} 2626}
2599 2627
2600int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model) 2628int has_turbo_ratio_limit(unsigned int family, unsigned int model)
2601{ 2629{
2602 if (has_slv_msrs(family, model)) 2630 if (has_slv_msrs(family, model))
2603 return 0; 2631 return 0;
@@ -2668,6 +2696,22 @@ int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
2668 return 0; 2696 return 0;
2669 } 2697 }
2670} 2698}
2699int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
2700{
2701 if (!genuine_intel)
2702 return 0;
2703
2704 if (family != 6)
2705 return 0;
2706
2707 switch (model) {
2708 case INTEL_FAM6_ATOM_GOLDMONT:
2709 case INTEL_FAM6_SKYLAKE_X:
2710 return 1;
2711 default:
2712 return 0;
2713 }
2714}
2671int has_config_tdp(unsigned int family, unsigned int model) 2715int has_config_tdp(unsigned int family, unsigned int model)
2672{ 2716{
2673 if (!genuine_intel) 2717 if (!genuine_intel)
@@ -2714,8 +2758,8 @@ dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
2714 if (has_ivt_turbo_ratio_limit(family, model)) 2758 if (has_ivt_turbo_ratio_limit(family, model))
2715 dump_ivt_turbo_ratio_limits(); 2759 dump_ivt_turbo_ratio_limits();
2716 2760
2717 if (has_nhm_turbo_ratio_limit(family, model)) 2761 if (has_turbo_ratio_limit(family, model))
2718 dump_nhm_turbo_ratio_limits(); 2762 dump_turbo_ratio_limits(family, model);
2719 2763
2720 if (has_atom_turbo_ratio_limit(family, model)) 2764 if (has_atom_turbo_ratio_limit(family, model))
2721 dump_atom_turbo_ratio_limits(); 2765 dump_atom_turbo_ratio_limits();