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authorThomas Gleixner <tglx@linutronix.de>2019-02-20 03:40:40 -0500
committerThomas Gleixner <tglx@linutronix.de>2019-03-06 15:52:15 -0500
commit22dd8365088b6403630b82423cf906491859b65e (patch)
tree117ad21ac265302596d4a11c35625312f2c25c0a
parent8a4b06d391b0a42a373808979b5028f5c84d9c6a (diff)
x86/speculation/mds: Add mitigation mode VMWERV
In virtualized environments it can happen that the host has the microcode update which utilizes the VERW instruction to clear CPU buffers, but the hypervisor is not yet updated to expose the X86_FEATURE_MD_CLEAR CPUID bit to guests. Introduce an internal mitigation mode VMWERV which enables the invocation of the CPU buffer clearing even if X86_FEATURE_MD_CLEAR is not set. If the system has no updated microcode this results in a pointless execution of the VERW instruction wasting a few CPU cycles. If the microcode is updated, but not exposed to a guest then the CPU buffers will be cleared. That said: Virtual Machines Will Eventually Receive Vaccine Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bp@suse.de> Reviewed-by: Jon Masters <jcm@redhat.com> Tested-by: Jon Masters <jcm@redhat.com>
-rw-r--r--Documentation/x86/mds.rst27
-rw-r--r--arch/x86/include/asm/processor.h1
-rw-r--r--arch/x86/kernel/cpu/bugs.c18
3 files changed, 40 insertions, 6 deletions
diff --git a/Documentation/x86/mds.rst b/Documentation/x86/mds.rst
index 87ce8ac9f36e..3d6f943f1afb 100644
--- a/Documentation/x86/mds.rst
+++ b/Documentation/x86/mds.rst
@@ -93,11 +93,38 @@ The kernel provides a function to invoke the buffer clearing:
93The mitigation is invoked on kernel/userspace, hypervisor/guest and C-state 93The mitigation is invoked on kernel/userspace, hypervisor/guest and C-state
94(idle) transitions. 94(idle) transitions.
95 95
96As a special quirk to address virtualization scenarios where the host has
97the microcode updated, but the hypervisor does not (yet) expose the
98MD_CLEAR CPUID bit to guests, the kernel issues the VERW instruction in the
99hope that it might actually clear the buffers. The state is reflected
100accordingly.
101
96According to current knowledge additional mitigations inside the kernel 102According to current knowledge additional mitigations inside the kernel
97itself are not required because the necessary gadgets to expose the leaked 103itself are not required because the necessary gadgets to expose the leaked
98data cannot be controlled in a way which allows exploitation from malicious 104data cannot be controlled in a way which allows exploitation from malicious
99user space or VM guests. 105user space or VM guests.
100 106
107Kernel internal mitigation modes
108--------------------------------
109
110 ======= ============================================================
111 off Mitigation is disabled. Either the CPU is not affected or
112 mds=off is supplied on the kernel command line
113
114 full Mitigation is eanbled. CPU is affected and MD_CLEAR is
115 advertised in CPUID.
116
117 vmwerv Mitigation is enabled. CPU is affected and MD_CLEAR is not
118 advertised in CPUID. That is mainly for virtualization
119 scenarios where the host has the updated microcode but the
120 hypervisor does not expose MD_CLEAR in CPUID. It's a best
121 effort approach without guarantee.
122 ======= ============================================================
123
124If the CPU is affected and mds=off is not supplied on the kernel command
125line then the kernel selects the appropriate mitigation mode depending on
126the availability of the MD_CLEAR CPUID bit.
127
101Mitigation points 128Mitigation points
102----------------- 129-----------------
103 130
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 1f0295783325..aca1ef8cc79f 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -995,6 +995,7 @@ extern enum l1tf_mitigations l1tf_mitigation;
995enum mds_mitigations { 995enum mds_mitigations {
996 MDS_MITIGATION_OFF, 996 MDS_MITIGATION_OFF,
997 MDS_MITIGATION_FULL, 997 MDS_MITIGATION_FULL,
998 MDS_MITIGATION_VMWERV,
998}; 999};
999 1000
1000#endif /* _ASM_X86_PROCESSOR_H */ 1001#endif /* _ASM_X86_PROCESSOR_H */
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 7ab16a6ed064..95cda38c8785 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -224,7 +224,8 @@ static enum mds_mitigations mds_mitigation __ro_after_init = MDS_MITIGATION_FULL
224 224
225static const char * const mds_strings[] = { 225static const char * const mds_strings[] = {
226 [MDS_MITIGATION_OFF] = "Vulnerable", 226 [MDS_MITIGATION_OFF] = "Vulnerable",
227 [MDS_MITIGATION_FULL] = "Mitigation: Clear CPU buffers" 227 [MDS_MITIGATION_FULL] = "Mitigation: Clear CPU buffers",
228 [MDS_MITIGATION_VMWERV] = "Vulnerable: Clear CPU buffers attempted, no microcode",
228}; 229};
229 230
230static void __init mds_select_mitigation(void) 231static void __init mds_select_mitigation(void)
@@ -235,10 +236,9 @@ static void __init mds_select_mitigation(void)
235 } 236 }
236 237
237 if (mds_mitigation == MDS_MITIGATION_FULL) { 238 if (mds_mitigation == MDS_MITIGATION_FULL) {
238 if (boot_cpu_has(X86_FEATURE_MD_CLEAR)) 239 if (!boot_cpu_has(X86_FEATURE_MD_CLEAR))
239 static_branch_enable(&mds_user_clear); 240 mds_mitigation = MDS_MITIGATION_VMWERV;
240 else 241 static_branch_enable(&mds_user_clear);
241 mds_mitigation = MDS_MITIGATION_OFF;
242 } 242 }
243 pr_info("%s\n", mds_strings[mds_mitigation]); 243 pr_info("%s\n", mds_strings[mds_mitigation]);
244} 244}
@@ -705,8 +705,14 @@ void arch_smt_update(void)
705 break; 705 break;
706 } 706 }
707 707
708 if (mds_mitigation == MDS_MITIGATION_FULL) 708 switch (mds_mitigation) {
709 case MDS_MITIGATION_FULL:
710 case MDS_MITIGATION_VMWERV:
709 update_mds_branch_idle(); 711 update_mds_branch_idle();
712 break;
713 case MDS_MITIGATION_OFF:
714 break;
715 }
710 716
711 mutex_unlock(&spec_ctrl_mutex); 717 mutex_unlock(&spec_ctrl_mutex);
712} 718}