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authorOndrej Zary <linux@zary.sk>2019-05-18 15:47:24 -0400
committerMartin K. Petersen <martin.petersen@oracle.com>2019-06-18 19:46:22 -0400
commit1697c6a64c49df3ed1a7e81845dcf2edf6ea23db (patch)
treedd2211b714171f3ba645b573bacd7547c2873e32
parentaa343c695aa59f03f31a2f989b8c977a727e46e3 (diff)
scsi: fdomain: Add register definitions
Add register bit definitions from documentation to header file and use them instead of magic constants. No changes to generated binary. Signed-off-by: Ondrej Zary <linux@zary.sk> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
-rw-r--r--drivers/scsi/fdomain.c144
-rw-r--r--drivers/scsi/fdomain.h117
-rw-r--r--drivers/scsi/fdomain_isa.c4
3 files changed, 167 insertions, 98 deletions
diff --git a/drivers/scsi/fdomain.c b/drivers/scsi/fdomain.c
index 19af1ae608df..297ccc799436 100644
--- a/drivers/scsi/fdomain.c
+++ b/drivers/scsi/fdomain.c
@@ -99,7 +99,7 @@
99 * up the machine. 99 * up the machine.
100 */ 100 */
101#define FIFO_COUNT 2 /* Number of 512 byte blocks before INTR */ 101#define FIFO_COUNT 2 /* Number of 512 byte blocks before INTR */
102#define PARITY_MASK 0x08 /* Parity enabled, 0x00 = disabled */ 102#define PARITY_MASK ACTL_PAREN /* Parity enabled, 0 = disabled */
103 103
104enum chip_type { 104enum chip_type {
105 unknown = 0x00, 105 unknown = 0x00,
@@ -117,18 +117,19 @@ struct fdomain {
117 117
118static inline void fdomain_make_bus_idle(struct fdomain *fd) 118static inline void fdomain_make_bus_idle(struct fdomain *fd)
119{ 119{
120 outb(0, fd->base + SCSI_Cntl); 120 outb(0, fd->base + REG_BCTL);
121 outb(0, fd->base + SCSI_Mode_Cntl); 121 outb(0, fd->base + REG_MCTL);
122 if (fd->chip == tmc18c50 || fd->chip == tmc18c30) 122 if (fd->chip == tmc18c50 || fd->chip == tmc18c30)
123 /* Clear forced intr. */ 123 /* Clear forced intr. */
124 outb(0x21 | PARITY_MASK, fd->base + TMC_Cntl); 124 outb(ACTL_RESET | ACTL_CLRFIRQ | PARITY_MASK,
125 fd->base + REG_ACTL);
125 else 126 else
126 outb(0x01 | PARITY_MASK, fd->base + TMC_Cntl); 127 outb(ACTL_RESET | PARITY_MASK, fd->base + REG_ACTL);
127} 128}
128 129
129static enum chip_type fdomain_identify(int port) 130static enum chip_type fdomain_identify(int port)
130{ 131{
131 u16 id = inb(port + LSB_ID_Code) | inb(port + MSB_ID_Code) << 8; 132 u16 id = inb(port + REG_ID_LSB) | inb(port + REG_ID_MSB) << 8;
132 133
133 switch (id) { 134 switch (id) {
134 case 0x6127: 135 case 0x6127:
@@ -140,10 +141,10 @@ static enum chip_type fdomain_identify(int port)
140 } 141 }
141 142
142 /* Try to toggle 32-bit mode. This only works on an 18c30 chip. */ 143 /* Try to toggle 32-bit mode. This only works on an 18c30 chip. */
143 outb(0x80, port + IO_Control); 144 outb(CFG2_32BIT, port + REG_CFG2);
144 if ((inb(port + Configuration2) & 0x80) == 0x80) { 145 if ((inb(port + REG_CFG2) & CFG2_32BIT)) {
145 outb(0x00, port + IO_Control); 146 outb(0, port + REG_CFG2);
146 if ((inb(port + Configuration2) & 0x80) == 0x00) 147 if ((inb(port + REG_CFG2) & CFG2_32BIT) == 0)
147 return tmc18c30; 148 return tmc18c30;
148 } 149 }
149 /* If that failed, we are an 18c50. */ 150 /* If that failed, we are an 18c50. */
@@ -155,8 +156,8 @@ static int fdomain_test_loopback(int base)
155 int i; 156 int i;
156 157
157 for (i = 0; i < 255; i++) { 158 for (i = 0; i < 255; i++) {
158 outb(i, base + Write_Loopback); 159 outb(i, base + REG_LOOPBACK);
159 if (inb(base + Read_Loopback) != i) 160 if (inb(base + REG_LOOPBACK) != i)
160 return 1; 161 return 1;
161 } 162 }
162 163
@@ -165,12 +166,12 @@ static int fdomain_test_loopback(int base)
165 166
166static void fdomain_reset(int base) 167static void fdomain_reset(int base)
167{ 168{
168 outb(1, base + SCSI_Cntl); 169 outb(1, base + REG_BCTL);
169 mdelay(20); 170 mdelay(20);
170 outb(0, base + SCSI_Cntl); 171 outb(0, base + REG_BCTL);
171 mdelay(1150); 172 mdelay(1150);
172 outb(0, base + SCSI_Mode_Cntl); 173 outb(0, base + REG_MCTL);
173 outb(PARITY_MASK, base + TMC_Cntl); 174 outb(PARITY_MASK, base + REG_ACTL);
174} 175}
175 176
176static int fdomain_select(struct Scsi_Host *sh, int target) 177static int fdomain_select(struct Scsi_Host *sh, int target)
@@ -179,20 +180,20 @@ static int fdomain_select(struct Scsi_Host *sh, int target)
179 unsigned long timeout; 180 unsigned long timeout;
180 struct fdomain *fd = shost_priv(sh); 181 struct fdomain *fd = shost_priv(sh);
181 182
182 outb(0x82, fd->base + SCSI_Cntl); /* Bus Enable + Select */ 183 outb(BCTL_BUSEN | BCTL_SEL, fd->base + REG_BCTL);
183 outb(BIT(sh->this_id) | BIT(target), fd->base + SCSI_Data_NoACK); 184 outb(BIT(sh->this_id) | BIT(target), fd->base + REG_SCSI_DATA_NOACK);
184 185
185 /* Stop arbitration and enable parity */ 186 /* Stop arbitration and enable parity */
186 outb(PARITY_MASK, fd->base + TMC_Cntl); 187 outb(PARITY_MASK, fd->base + REG_ACTL);
187 188
188 timeout = 350; /* 350 msec */ 189 timeout = 350; /* 350 msec */
189 190
190 do { 191 do {
191 status = inb(fd->base + SCSI_Status); /* Read adapter status */ 192 status = inb(fd->base + REG_BSTAT);
192 if (status & 1) { /* Busy asserted */ 193 if (status & BSTAT_BSY) {
193 /* Enable SCSI Bus */ 194 /* Enable SCSI Bus */
194 /* (on error, should make bus idle with 0) */ 195 /* (on error, should make bus idle with 0) */
195 outb(0x80, fd->base + SCSI_Cntl); 196 outb(BCTL_BUSEN, fd->base + REG_BCTL);
196 return 0; 197 return 0;
197 } 198 }
198 mdelay(1); 199 mdelay(1);
@@ -203,7 +204,7 @@ static int fdomain_select(struct Scsi_Host *sh, int target)
203 204
204static void fdomain_finish_cmd(struct fdomain *fd, int result) 205static void fdomain_finish_cmd(struct fdomain *fd, int result)
205{ 206{
206 outb(0x00, fd->base + Interrupt_Cntl); 207 outb(0, fd->base + REG_ICTL);
207 fdomain_make_bus_idle(fd); 208 fdomain_make_bus_idle(fd);
208 fd->cur_cmd->result = result; 209 fd->cur_cmd->result = result;
209 fd->cur_cmd->scsi_done(fd->cur_cmd); 210 fd->cur_cmd->scsi_done(fd->cur_cmd);
@@ -216,15 +217,15 @@ static void fdomain_read_data(struct scsi_cmnd *cmd)
216 unsigned char *virt, *ptr; 217 unsigned char *virt, *ptr;
217 size_t offset, len; 218 size_t offset, len;
218 219
219 while ((len = inw(fd->base + FIFO_Data_Count)) > 0) { 220 while ((len = inw(fd->base + REG_FIFO_COUNT)) > 0) {
220 offset = scsi_bufflen(cmd) - scsi_get_resid(cmd); 221 offset = scsi_bufflen(cmd) - scsi_get_resid(cmd);
221 virt = scsi_kmap_atomic_sg(scsi_sglist(cmd), scsi_sg_count(cmd), 222 virt = scsi_kmap_atomic_sg(scsi_sglist(cmd), scsi_sg_count(cmd),
222 &offset, &len); 223 &offset, &len);
223 ptr = virt + offset; 224 ptr = virt + offset;
224 if (len & 1) 225 if (len & 1)
225 *ptr++ = inb(fd->base + Read_FIFO); 226 *ptr++ = inb(fd->base + REG_FIFO);
226 if (len > 1) 227 if (len > 1)
227 insw(fd->base + Read_FIFO, ptr, len >> 1); 228 insw(fd->base + REG_FIFO, ptr, len >> 1);
228 scsi_set_resid(cmd, scsi_get_resid(cmd) - len); 229 scsi_set_resid(cmd, scsi_get_resid(cmd) - len);
229 scsi_kunmap_atomic_sg(virt); 230 scsi_kunmap_atomic_sg(virt);
230 } 231 }
@@ -238,7 +239,7 @@ static void fdomain_write_data(struct scsi_cmnd *cmd)
238 unsigned char *virt, *ptr; 239 unsigned char *virt, *ptr;
239 size_t offset, len; 240 size_t offset, len;
240 241
241 while ((len = FIFO_Size - inw(fd->base + FIFO_Data_Count)) > 512) { 242 while ((len = FIFO_Size - inw(fd->base + REG_FIFO_COUNT)) > 512) {
242 offset = scsi_bufflen(cmd) - scsi_get_resid(cmd); 243 offset = scsi_bufflen(cmd) - scsi_get_resid(cmd);
243 if (len + offset > scsi_bufflen(cmd)) { 244 if (len + offset > scsi_bufflen(cmd)) {
244 len = scsi_bufflen(cmd) - offset; 245 len = scsi_bufflen(cmd) - offset;
@@ -249,9 +250,9 @@ static void fdomain_write_data(struct scsi_cmnd *cmd)
249 &offset, &len); 250 &offset, &len);
250 ptr = virt + offset; 251 ptr = virt + offset;
251 if (len & 1) 252 if (len & 1)
252 outb(*ptr++, fd->base + Write_FIFO); 253 outb(*ptr++, fd->base + REG_FIFO);
253 if (len > 1) 254 if (len > 1)
254 outsw(fd->base + Write_FIFO, ptr, len >> 1); 255 outsw(fd->base + REG_FIFO, ptr, len >> 1);
255 scsi_set_resid(cmd, scsi_get_resid(cmd) - len); 256 scsi_set_resid(cmd, scsi_get_resid(cmd) - len);
256 scsi_kunmap_atomic_sg(virt); 257 scsi_kunmap_atomic_sg(virt);
257 } 258 }
@@ -270,66 +271,68 @@ static void fdomain_work(struct work_struct *work)
270 spin_lock_irqsave(sh->host_lock, flags); 271 spin_lock_irqsave(sh->host_lock, flags);
271 272
272 if (cmd->SCp.phase & in_arbitration) { 273 if (cmd->SCp.phase & in_arbitration) {
273 status = inb(fd->base + TMC_Status); 274 status = inb(fd->base + REG_ASTAT);
274 if (!(status & 0x02)) { 275 if (!(status & ASTAT_ARB)) {
275 fdomain_finish_cmd(fd, DID_BUS_BUSY << 16); 276 fdomain_finish_cmd(fd, DID_BUS_BUSY << 16);
276 goto out; 277 goto out;
277 } 278 }
278 cmd->SCp.phase = in_selection; 279 cmd->SCp.phase = in_selection;
279 280
280 outb(0x40 | FIFO_COUNT, fd->base + Interrupt_Cntl); 281 outb(ICTL_SEL | FIFO_COUNT, fd->base + REG_ICTL);
281 outb(0x82, fd->base + SCSI_Cntl); /* Bus Enable + Select */ 282 outb(BCTL_BUSEN | BCTL_SEL, fd->base + REG_BCTL);
282 outb(BIT(cmd->device->host->this_id) | 283 outb(BIT(cmd->device->host->this_id) | BIT(scmd_id(cmd)),
283 BIT(scmd_id(cmd)), fd->base + SCSI_Data_NoACK); 284 fd->base + REG_SCSI_DATA_NOACK);
284 /* Stop arbitration and enable parity */ 285 /* Stop arbitration and enable parity */
285 outb(0x10 | PARITY_MASK, fd->base + TMC_Cntl); 286 outb(ACTL_IRQEN | PARITY_MASK, fd->base + REG_ACTL);
286 goto out; 287 goto out;
287 } else if (cmd->SCp.phase & in_selection) { 288 } else if (cmd->SCp.phase & in_selection) {
288 status = inb(fd->base + SCSI_Status); 289 status = inb(fd->base + REG_BSTAT);
289 if (!(status & 0x01)) { 290 if (!(status & BSTAT_BSY)) {
290 /* Try again, for slow devices */ 291 /* Try again, for slow devices */
291 if (fdomain_select(cmd->device->host, scmd_id(cmd))) { 292 if (fdomain_select(cmd->device->host, scmd_id(cmd))) {
292 fdomain_finish_cmd(fd, DID_NO_CONNECT << 16); 293 fdomain_finish_cmd(fd, DID_NO_CONNECT << 16);
293 goto out; 294 goto out;
294 } 295 }
295 /* Stop arbitration and enable parity */ 296 /* Stop arbitration and enable parity */
296 outb(0x10 | PARITY_MASK, fd->base + TMC_Cntl); 297 outb(ACTL_IRQEN | PARITY_MASK, fd->base + REG_ACTL);
297 } 298 }
298 cmd->SCp.phase = in_other; 299 cmd->SCp.phase = in_other;
299 outb(0x90 | FIFO_COUNT, fd->base + Interrupt_Cntl); 300 outb(ICTL_FIFO | ICTL_REQ | FIFO_COUNT, fd->base + REG_ICTL);
300 outb(0x80, fd->base + SCSI_Cntl); 301 outb(BCTL_BUSEN, fd->base + REG_BCTL);
301 goto out; 302 goto out;
302 } 303 }
303 304
304 /* cur_cmd->SCp.phase == in_other: this is the body of the routine */ 305 /* cur_cmd->SCp.phase == in_other: this is the body of the routine */
305 status = inb(fd->base + SCSI_Status); 306 status = inb(fd->base + REG_BSTAT);
306 307
307 if (status & 0x10) { /* REQ */ 308 if (status & BSTAT_REQ) {
308 switch (status & 0x0e) { 309 switch (status & 0x0e) {
309 case 0x08: /* COMMAND OUT */ 310 case BSTAT_CMD: /* COMMAND OUT */
310 outb(cmd->cmnd[cmd->SCp.sent_command++], 311 outb(cmd->cmnd[cmd->SCp.sent_command++],
311 fd->base + Write_SCSI_Data); 312 fd->base + REG_SCSI_DATA);
312 break; 313 break;
313 case 0x00: /* DATA OUT -- tmc18c50/tmc18c30 only */ 314 case 0: /* DATA OUT -- tmc18c50/tmc18c30 only */
314 if (fd->chip != tmc1800 && !cmd->SCp.have_data_in) { 315 if (fd->chip != tmc1800 && !cmd->SCp.have_data_in) {
315 cmd->SCp.have_data_in = -1; 316 cmd->SCp.have_data_in = -1;
316 outb(0xd0 | PARITY_MASK, fd->base + TMC_Cntl); 317 outb(ACTL_IRQEN | ACTL_FIFOWR | ACTL_FIFOEN |
318 PARITY_MASK, fd->base + REG_ACTL);
317 } 319 }
318 break; 320 break;
319 case 0x04: /* DATA IN -- tmc18c50/tmc18c30 only */ 321 case BSTAT_IO: /* DATA IN -- tmc18c50/tmc18c30 only */
320 if (fd->chip != tmc1800 && !cmd->SCp.have_data_in) { 322 if (fd->chip != tmc1800 && !cmd->SCp.have_data_in) {
321 cmd->SCp.have_data_in = 1; 323 cmd->SCp.have_data_in = 1;
322 outb(0x90 | PARITY_MASK, fd->base + TMC_Cntl); 324 outb(ACTL_IRQEN | ACTL_FIFOEN | PARITY_MASK,
325 fd->base + REG_ACTL);
323 } 326 }
324 break; 327 break;
325 case 0x0c: /* STATUS IN */ 328 case BSTAT_CMD | BSTAT_IO: /* STATUS IN */
326 cmd->SCp.Status = inb(fd->base + Read_SCSI_Data); 329 cmd->SCp.Status = inb(fd->base + REG_SCSI_DATA);
327 break; 330 break;
328 case 0x0a: /* MESSAGE OUT */ 331 case BSTAT_MSG | BSTAT_CMD: /* MESSAGE OUT */
329 outb(MESSAGE_REJECT, fd->base + Write_SCSI_Data); 332 outb(MESSAGE_REJECT, fd->base + REG_SCSI_DATA);
330 break; 333 break;
331 case 0x0e: /* MESSAGE IN */ 334 case BSTAT_MSG | BSTAT_IO | BSTAT_CMD: /* MESSAGE IN */
332 cmd->SCp.Message = inb(fd->base + Read_SCSI_Data); 335 cmd->SCp.Message = inb(fd->base + REG_SCSI_DATA);
333 if (!cmd->SCp.Message) 336 if (!cmd->SCp.Message)
334 ++done; 337 ++done;
335 break; 338 break;
@@ -340,10 +343,12 @@ static void fdomain_work(struct work_struct *work)
340 cmd->SCp.sent_command >= cmd->cmd_len) { 343 cmd->SCp.sent_command >= cmd->cmd_len) {
341 if (cmd->sc_data_direction == DMA_TO_DEVICE) { 344 if (cmd->sc_data_direction == DMA_TO_DEVICE) {
342 cmd->SCp.have_data_in = -1; 345 cmd->SCp.have_data_in = -1;
343 outb(0xd0 | PARITY_MASK, fd->base + TMC_Cntl); 346 outb(ACTL_IRQEN | ACTL_FIFOWR | ACTL_FIFOEN |
347 PARITY_MASK, fd->base + REG_ACTL);
344 } else { 348 } else {
345 cmd->SCp.have_data_in = 1; 349 cmd->SCp.have_data_in = 1;
346 outb(0x90 | PARITY_MASK, fd->base + TMC_Cntl); 350 outb(ACTL_IRQEN | ACTL_FIFOEN | PARITY_MASK,
351 fd->base + REG_ACTL);
347 } 352 }
348 } 353 }
349 354
@@ -359,10 +364,12 @@ static void fdomain_work(struct work_struct *work)
359 (DID_OK << 16)); 364 (DID_OK << 16));
360 } else { 365 } else {
361 if (cmd->SCp.phase & disconnect) { 366 if (cmd->SCp.phase & disconnect) {
362 outb(0xd0 | FIFO_COUNT, fd->base + Interrupt_Cntl); 367 outb(ICTL_FIFO | ICTL_SEL | ICTL_REQ | FIFO_COUNT,
363 outb(0x00, fd->base + SCSI_Cntl); 368 fd->base + REG_ICTL);
369 outb(0, fd->base + REG_BCTL);
364 } else 370 } else
365 outb(0x90 | FIFO_COUNT, fd->base + Interrupt_Cntl); 371 outb(ICTL_FIFO | ICTL_REQ | FIFO_COUNT,
372 fd->base + REG_ICTL);
366 } 373 }
367out: 374out:
368 spin_unlock_irqrestore(sh->host_lock, flags); 375 spin_unlock_irqrestore(sh->host_lock, flags);
@@ -373,10 +380,10 @@ static irqreturn_t fdomain_irq(int irq, void *dev_id)
373 struct fdomain *fd = dev_id; 380 struct fdomain *fd = dev_id;
374 381
375 /* Is it our IRQ? */ 382 /* Is it our IRQ? */
376 if ((inb(fd->base + TMC_Status) & 0x01) == 0) 383 if ((inb(fd->base + REG_ASTAT) & ASTAT_IRQ) == 0)
377 return IRQ_NONE; 384 return IRQ_NONE;
378 385
379 outb(0x00, fd->base + Interrupt_Cntl); 386 outb(0, fd->base + REG_ICTL);
380 387
381 /* We usually have one spurious interrupt after each command. */ 388 /* We usually have one spurious interrupt after each command. */
382 if (!fd->cur_cmd) /* Spurious interrupt */ 389 if (!fd->cur_cmd) /* Spurious interrupt */
@@ -406,12 +413,13 @@ static int fdomain_queue(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
406 fdomain_make_bus_idle(fd); 413 fdomain_make_bus_idle(fd);
407 414
408 /* Start arbitration */ 415 /* Start arbitration */
409 outb(0x00, fd->base + Interrupt_Cntl); 416 outb(0, fd->base + REG_ICTL);
410 outb(0x00, fd->base + SCSI_Cntl); /* Disable data drivers */ 417 outb(0, fd->base + REG_BCTL); /* Disable data drivers */
411 outb(BIT(cmd->device->host->this_id), 418 /* Set our id bit */
412 fd->base + SCSI_Data_NoACK); /* Set our id bit */ 419 outb(BIT(cmd->device->host->this_id), fd->base + REG_SCSI_DATA_NOACK);
413 outb(0x20, fd->base + Interrupt_Cntl); 420 outb(ICTL_ARB, fd->base + REG_ICTL);
414 outb(0x14 | PARITY_MASK, fd->base + TMC_Cntl); /* Start arbitration */ 421 /* Start arbitration */
422 outb(ACTL_ARB | ACTL_IRQEN | PARITY_MASK, fd->base + REG_ACTL);
415 423
416 spin_unlock_irqrestore(sh->host_lock, flags); 424 spin_unlock_irqrestore(sh->host_lock, flags);
417 425
diff --git a/drivers/scsi/fdomain.h b/drivers/scsi/fdomain.h
index fabb2e49461f..6f63fc6b0d12 100644
--- a/drivers/scsi/fdomain.h
+++ b/drivers/scsi/fdomain.h
@@ -12,34 +12,95 @@ enum {
12 sent_ident = 0x40, 12 sent_ident = 0x40,
13}; 13};
14 14
15enum in_port_type { 15/* (@) = not present on TMC1800, (#) = not present on TMC1800 and TMC18C50 */
16 Read_SCSI_Data = 0, 16#define REG_SCSI_DATA 0 /* R/W: SCSI Data (with ACK) */
17 SCSI_Status = 1, 17#define REG_BSTAT 1 /* R: SCSI Bus Status */
18 TMC_Status = 2, 18#define BSTAT_BSY BIT(0) /* Busy */
19 FIFO_Status = 3, /* tmc18c50/tmc18c30 only */ 19#define BSTAT_MSG BIT(1) /* Message */
20 Interrupt_Cond = 4, /* tmc18c50/tmc18c30 only */ 20#define BSTAT_IO BIT(2) /* Input/Output */
21 LSB_ID_Code = 5, 21#define BSTAT_CMD BIT(3) /* Command/Data */
22 MSB_ID_Code = 6, 22#define BSTAT_REQ BIT(4) /* Request and Not Ack */
23 Read_Loopback = 7, 23#define BSTAT_SEL BIT(5) /* Select */
24 SCSI_Data_NoACK = 8, 24#define BSTAT_ACK BIT(6) /* Acknowledge and Request */
25 Interrupt_Status = 9, 25#define BSTAT_ATN BIT(7) /* Attention */
26 Configuration1 = 10, 26#define REG_BCTL 1 /* W: SCSI Bus Control */
27 Configuration2 = 11, /* tmc18c50/tmc18c30 only */ 27#define BCTL_RST BIT(0) /* Bus Reset */
28 Read_FIFO = 12, 28#define BCTL_SEL BIT(1) /* Select */
29 FIFO_Data_Count = 14 29#define BCTL_BSY BIT(2) /* Busy */
30}; 30#define BCTL_ATN BIT(3) /* Attention */
31 31#define BCTL_IO BIT(4) /* Input/Output */
32enum out_port_type { 32#define BCTL_CMD BIT(5) /* Command/Data */
33 Write_SCSI_Data = 0, 33#define BCTL_MSG BIT(6) /* Message */
34 SCSI_Cntl = 1, 34#define BCTL_BUSEN BIT(7) /* Enable bus drivers */
35 Interrupt_Cntl = 2, 35#define REG_ASTAT 2 /* R: Adapter Status 1 */
36 SCSI_Mode_Cntl = 3, 36#define ASTAT_IRQ BIT(0) /* Interrupt active */
37 TMC_Cntl = 4, 37#define ASTAT_ARB BIT(1) /* Arbitration complete */
38 Memory_Cntl = 5, /* tmc18c50/tmc18c30 only */ 38#define ASTAT_PARERR BIT(2) /* Parity error */
39 Write_Loopback = 7, 39#define ASTAT_RST BIT(3) /* SCSI reset occurred */
40 IO_Control = 11, /* tmc18c30 only */ 40#define ASTAT_FIFODIR BIT(4) /* FIFO direction */
41 Write_FIFO = 12 41#define ASTAT_FIFOEN BIT(5) /* FIFO enabled */
42}; 42#define ASTAT_PAREN BIT(6) /* Parity enabled */
43#define ASTAT_BUSEN BIT(7) /* Bus drivers enabled */
44#define REG_ICTL 2 /* W: Interrupt Control */
45#define ICTL_FIFO_MASK 0x0f /* FIFO threshold, 1/16 FIFO size */
46#define ICTL_FIFO BIT(4) /* Int. on FIFO count */
47#define ICTL_ARB BIT(5) /* Int. on Arbitration complete */
48#define ICTL_SEL BIT(6) /* Int. on SCSI Select */
49#define ICTL_REQ BIT(7) /* Int. on SCSI Request */
50#define REG_FSTAT 3 /* R: Adapter Status 2 (FIFO) - (@) */
51#define FSTAT_ONOTEMPTY BIT(0) /* Output FIFO not empty */
52#define FSTAT_INOTEMPTY BIT(1) /* Input FIFO not empty */
53#define FSTAT_NOTEMPTY BIT(2) /* Main FIFO not empty */
54#define FSTAT_NOTFULL BIT(3) /* Main FIFO not full */
55#define REG_MCTL 3 /* W: SCSI Data Mode Control */
56#define MCTL_ACK_MASK 0x0f /* Acknowledge period */
57#define MCTL_ACTDEASS BIT(4) /* Active deassert of REQ and ACK */
58#define MCTL_TARGET BIT(5) /* Enable target mode */
59#define MCTL_FASTSYNC BIT(6) /* Enable Fast Synchronous */
60#define MCTL_SYNC BIT(7) /* Enable Synchronous */
61#define REG_INTCOND 4 /* R: Interrupt Condition - (@) */
62#define IRQ_FIFO BIT(1) /* FIFO interrupt */
63#define IRQ_REQ BIT(2) /* SCSI Request interrupt */
64#define IRQ_SEL BIT(3) /* SCSI Select interrupt */
65#define IRQ_ARB BIT(4) /* SCSI Arbitration interrupt */
66#define IRQ_RST BIT(5) /* SCSI Reset interrupt */
67#define IRQ_FORCED BIT(6) /* Forced interrupt */
68#define IRQ_TIMEOUT BIT(7) /* Bus timeout */
69#define REG_ACTL 4 /* W: Adapter Control 1 */
70#define ACTL_RESET BIT(0) /* Reset FIFO, parity, reset int. */
71#define ACTL_FIRQ BIT(1) /* Set Forced interrupt */
72#define ACTL_ARB BIT(2) /* Initiate Bus Arbitration */
73#define ACTL_PAREN BIT(3) /* Enable SCSI Parity */
74#define ACTL_IRQEN BIT(4) /* Enable interrupts */
75#define ACTL_CLRFIRQ BIT(5) /* Clear Forced interrupt */
76#define ACTL_FIFOWR BIT(6) /* FIFO Direction (1=write) */
77#define ACTL_FIFOEN BIT(7) /* Enable FIFO */
78#define REG_ID_LSB 5 /* R: ID Code (LSB) */
79#define REG_ACTL2 5 /* Adapter Control 2 - (@) */
80#define ACTL2_RAMOVRLY BIT(0) /* Enable RAM overlay */
81#define ACTL2_SLEEP BIT(7) /* Sleep mode */
82#define REG_ID_MSB 6 /* R: ID Code (MSB) */
83#define REG_LOOPBACK 7 /* R/W: Loopback */
84#define REG_SCSI_DATA_NOACK 8 /* R/W: SCSI Data (no ACK) */
85#define REG_ASTAT3 9 /* R: Adapter Status 3 */
86#define ASTAT3_ACTDEASS BIT(0) /* Active deassert enabled */
87#define ASTAT3_RAMOVRLY BIT(1) /* RAM overlay enabled */
88#define ASTAT3_TARGERR BIT(2) /* Target error */
89#define ASTAT3_IRQEN BIT(3) /* Interrupts enabled */
90#define ASTAT3_IRQMASK 0xf0 /* Enabled interrupts mask */
91#define REG_CFG1 10 /* R: Configuration Register 1 */
92#define CFG1_BUS BIT(0) /* 0 = ISA */
93#define CFG1_IRQ_MASK 0x0e /* IRQ jumpers */
94#define CFG1_IO_MASK 0x30 /* I/O base jumpers */
95#define CFG1_BIOS_MASK 0xc0 /* BIOS base jumpers */
96#define REG_CFG2 11 /* R/W: Configuration Register 2 (@) */
97#define CFG2_ROMDIS BIT(0) /* ROM disabled */
98#define CFG2_RAMDIS BIT(1) /* RAM disabled */
99#define CFG2_IRQEDGE BIT(2) /* Edge-triggered interrupts */
100#define CFG2_NOWS BIT(3) /* No wait states */
101#define CFG2_32BIT BIT(7) /* 32-bit mode */
102#define REG_FIFO 12 /* R/W: FIFO */
103#define REG_FIFO_COUNT 14 /* R: FIFO Data Count */
43 104
44#ifdef CONFIG_PM_SLEEP 105#ifdef CONFIG_PM_SLEEP
45static const struct dev_pm_ops fdomain_pm_ops; 106static const struct dev_pm_ops fdomain_pm_ops;
diff --git a/drivers/scsi/fdomain_isa.c b/drivers/scsi/fdomain_isa.c
index bca5d56f12aa..28639adf8219 100644
--- a/drivers/scsi/fdomain_isa.c
+++ b/drivers/scsi/fdomain_isa.c
@@ -131,7 +131,7 @@ static int fdomain_isa_match(struct device *dev, unsigned int ndev)
131 if (!request_region(base, FDOMAIN_REGION_SIZE, "fdomain_isa")) 131 if (!request_region(base, FDOMAIN_REGION_SIZE, "fdomain_isa"))
132 return 0; 132 return 0;
133 133
134 irq = irqs[(inb(base + Configuration1) & 0x0e) >> 1]; 134 irq = irqs[(inb(base + REG_CFG1) & 0x0e) >> 1];
135 135
136 136
137 if (sig) 137 if (sig)
@@ -164,7 +164,7 @@ static int fdomain_isa_param_match(struct device *dev, unsigned int ndev)
164 } 164 }
165 165
166 if (irq_ <= 0) 166 if (irq_ <= 0)
167 irq_ = irqs[(inb(io[ndev] + Configuration1) & 0x0e) >> 1]; 167 irq_ = irqs[(inb(io[ndev] + REG_CFG1) & 0x0e) >> 1];
168 168
169 sh = fdomain_create(io[ndev], irq_, scsi_id[ndev], dev); 169 sh = fdomain_create(io[ndev], irq_, scsi_id[ndev], dev);
170 if (!sh) { 170 if (!sh) {