diff options
author | Baruch Siach <baruch@tkos.co.il> | 2018-12-04 09:03:53 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2018-12-05 00:17:15 -0500 |
commit | 0fb628f0f250c74b1023edd0ca4a57c8b35b9b2c (patch) | |
tree | ecea9421512b082b4d88a24d4f3d04508b0c9a17 | |
parent | 01b3fd5ac97caffb8e5d5bd85086da33db3b361f (diff) |
net: mvpp2: fix phylink handling of invalid PHY modes
The .validate phylink callback should empty the supported bitmap when
the interface mode is invalid.
Cc: Maxime Chevallier <maxime.chevallier@bootlin.com>
Cc: Antoine Tenart <antoine.tenart@bootlin.com>
Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index eb1dc8abc359..125ea99418df 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | |||
@@ -4375,8 +4375,27 @@ static void mvpp2_phylink_validate(struct net_device *dev, | |||
4375 | unsigned long *supported, | 4375 | unsigned long *supported, |
4376 | struct phylink_link_state *state) | 4376 | struct phylink_link_state *state) |
4377 | { | 4377 | { |
4378 | struct mvpp2_port *port = netdev_priv(dev); | ||
4378 | __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; | 4379 | __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; |
4379 | 4380 | ||
4381 | /* Invalid combinations */ | ||
4382 | switch (state->interface) { | ||
4383 | case PHY_INTERFACE_MODE_10GKR: | ||
4384 | case PHY_INTERFACE_MODE_XAUI: | ||
4385 | if (port->gop_id != 0) | ||
4386 | goto empty_set; | ||
4387 | break; | ||
4388 | case PHY_INTERFACE_MODE_RGMII: | ||
4389 | case PHY_INTERFACE_MODE_RGMII_ID: | ||
4390 | case PHY_INTERFACE_MODE_RGMII_RXID: | ||
4391 | case PHY_INTERFACE_MODE_RGMII_TXID: | ||
4392 | if (port->gop_id == 0) | ||
4393 | goto empty_set; | ||
4394 | break; | ||
4395 | default: | ||
4396 | break; | ||
4397 | } | ||
4398 | |||
4380 | phylink_set(mask, Autoneg); | 4399 | phylink_set(mask, Autoneg); |
4381 | phylink_set_port_modes(mask); | 4400 | phylink_set_port_modes(mask); |
4382 | phylink_set(mask, Pause); | 4401 | phylink_set(mask, Pause); |
@@ -4384,6 +4403,7 @@ static void mvpp2_phylink_validate(struct net_device *dev, | |||
4384 | 4403 | ||
4385 | switch (state->interface) { | 4404 | switch (state->interface) { |
4386 | case PHY_INTERFACE_MODE_10GKR: | 4405 | case PHY_INTERFACE_MODE_10GKR: |
4406 | case PHY_INTERFACE_MODE_XAUI: | ||
4387 | case PHY_INTERFACE_MODE_NA: | 4407 | case PHY_INTERFACE_MODE_NA: |
4388 | phylink_set(mask, 10000baseCR_Full); | 4408 | phylink_set(mask, 10000baseCR_Full); |
4389 | phylink_set(mask, 10000baseSR_Full); | 4409 | phylink_set(mask, 10000baseSR_Full); |
@@ -4392,7 +4412,11 @@ static void mvpp2_phylink_validate(struct net_device *dev, | |||
4392 | phylink_set(mask, 10000baseER_Full); | 4412 | phylink_set(mask, 10000baseER_Full); |
4393 | phylink_set(mask, 10000baseKR_Full); | 4413 | phylink_set(mask, 10000baseKR_Full); |
4394 | /* Fall-through */ | 4414 | /* Fall-through */ |
4395 | default: | 4415 | case PHY_INTERFACE_MODE_RGMII: |
4416 | case PHY_INTERFACE_MODE_RGMII_ID: | ||
4417 | case PHY_INTERFACE_MODE_RGMII_RXID: | ||
4418 | case PHY_INTERFACE_MODE_RGMII_TXID: | ||
4419 | case PHY_INTERFACE_MODE_SGMII: | ||
4396 | phylink_set(mask, 10baseT_Half); | 4420 | phylink_set(mask, 10baseT_Half); |
4397 | phylink_set(mask, 10baseT_Full); | 4421 | phylink_set(mask, 10baseT_Full); |
4398 | phylink_set(mask, 100baseT_Half); | 4422 | phylink_set(mask, 100baseT_Half); |
@@ -4404,11 +4428,18 @@ static void mvpp2_phylink_validate(struct net_device *dev, | |||
4404 | phylink_set(mask, 1000baseT_Full); | 4428 | phylink_set(mask, 1000baseT_Full); |
4405 | phylink_set(mask, 1000baseX_Full); | 4429 | phylink_set(mask, 1000baseX_Full); |
4406 | phylink_set(mask, 2500baseX_Full); | 4430 | phylink_set(mask, 2500baseX_Full); |
4431 | break; | ||
4432 | default: | ||
4433 | goto empty_set; | ||
4407 | } | 4434 | } |
4408 | 4435 | ||
4409 | bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); | 4436 | bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); |
4410 | bitmap_and(state->advertising, state->advertising, mask, | 4437 | bitmap_and(state->advertising, state->advertising, mask, |
4411 | __ETHTOOL_LINK_MODE_MASK_NBITS); | 4438 | __ETHTOOL_LINK_MODE_MASK_NBITS); |
4439 | return; | ||
4440 | |||
4441 | empty_set: | ||
4442 | bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); | ||
4412 | } | 4443 | } |
4413 | 4444 | ||
4414 | static void mvpp22_xlg_link_state(struct mvpp2_port *port, | 4445 | static void mvpp22_xlg_link_state(struct mvpp2_port *port, |