diff options
author | Edgar Bernardi Righi <edgar.righi@lsitec.org.br> | 2019-01-14 22:33:36 -0500 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2019-02-22 03:01:08 -0500 |
commit | 0c8c53e033d278cad09a81ec1c46a401a6a6b1af (patch) | |
tree | 3fa5671e6f078fee2487f8a84300da7d53ba987d | |
parent | 9831289f6f629b6aac4bd4491bc54dcebdc0b6ba (diff) |
dt-bindings: clock: Add DT bindings for Actions Semi S500 CMU
Add devicetree bindings for Actions Semi S500 Clock Management Unit.
Signed-off-by: Edgar Bernardi Righi <edgar.righi@lsitec.org.br>
[Mani: Documented S500 CMU compatible]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Fix SPDX comment style in header file]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/clock/actions,owl-cmu.txt | 7 | ||||
-rw-r--r-- | include/dt-bindings/clock/actions,s500-cmu.h | 78 |
2 files changed, 82 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt b/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt index 2ef86ae96df8..d19885b7c73f 100644 --- a/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt +++ b/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt | |||
@@ -2,13 +2,14 @@ | |||
2 | 2 | ||
3 | The Actions Semi Owl Clock Management Unit generates and supplies clock | 3 | The Actions Semi Owl Clock Management Unit generates and supplies clock |
4 | to various controllers within the SoC. The clock binding described here is | 4 | to various controllers within the SoC. The clock binding described here is |
5 | applicable to S900 and S700 SoC's. | 5 | applicable to S900, S700 and S500 SoC's. |
6 | 6 | ||
7 | Required Properties: | 7 | Required Properties: |
8 | 8 | ||
9 | - compatible: should be one of the following, | 9 | - compatible: should be one of the following, |
10 | "actions,s900-cmu" | 10 | "actions,s900-cmu" |
11 | "actions,s700-cmu" | 11 | "actions,s700-cmu" |
12 | "actions,s500-cmu" | ||
12 | - reg: physical base address of the controller and length of memory mapped | 13 | - reg: physical base address of the controller and length of memory mapped |
13 | region. | 14 | region. |
14 | - clocks: Reference to the parent clocks ("hosc", "losc") | 15 | - clocks: Reference to the parent clocks ("hosc", "losc") |
@@ -19,8 +20,8 @@ Each clock is assigned an identifier, and client nodes can use this identifier | |||
19 | to specify the clock which they consume. | 20 | to specify the clock which they consume. |
20 | 21 | ||
21 | All available clocks are defined as preprocessor macros in corresponding | 22 | All available clocks are defined as preprocessor macros in corresponding |
22 | dt-bindings/clock/actions,s900-cmu.h or actions,s700-cmu.h header and can be | 23 | dt-bindings/clock/actions,s900-cmu.h or actions,s700-cmu.h or |
23 | used in device tree sources. | 24 | actions,s500-cmu.h header and can be used in device tree sources. |
24 | 25 | ||
25 | External clocks: | 26 | External clocks: |
26 | 27 | ||
diff --git a/include/dt-bindings/clock/actions,s500-cmu.h b/include/dt-bindings/clock/actions,s500-cmu.h new file mode 100644 index 000000000000..030981cd2d56 --- /dev/null +++ b/include/dt-bindings/clock/actions,s500-cmu.h | |||
@@ -0,0 +1,78 @@ | |||
1 | /* SPDX-License-Identifier: GPL-2.0+ */ | ||
2 | /* | ||
3 | * Device Tree binding constants for Actions Semi S500 Clock Management Unit | ||
4 | * | ||
5 | * Copyright (c) 2014 Actions Semi Inc. | ||
6 | * Copyright (c) 2018 LSI-TEC - Caninos Loucos | ||
7 | */ | ||
8 | |||
9 | #ifndef __DT_BINDINGS_CLOCK_S500_CMU_H | ||
10 | #define __DT_BINDINGS_CLOCK_S500_CMU_H | ||
11 | |||
12 | #define CLK_NONE 0 | ||
13 | |||
14 | /* fixed rate clocks */ | ||
15 | #define CLK_LOSC 1 | ||
16 | #define CLK_HOSC 2 | ||
17 | |||
18 | /* pll clocks */ | ||
19 | #define CLK_CORE_PLL 3 | ||
20 | #define CLK_DEV_PLL 4 | ||
21 | #define CLK_DDR_PLL 5 | ||
22 | #define CLK_NAND_PLL 6 | ||
23 | #define CLK_DISPLAY_PLL 7 | ||
24 | #define CLK_ETHERNET_PLL 8 | ||
25 | #define CLK_AUDIO_PLL 9 | ||
26 | |||
27 | /* system clock */ | ||
28 | #define CLK_DEV 10 | ||
29 | #define CLK_H 11 | ||
30 | #define CLK_AHBPREDIV 12 | ||
31 | #define CLK_AHB 13 | ||
32 | #define CLK_DE 14 | ||
33 | #define CLK_BISP 15 | ||
34 | #define CLK_VCE 16 | ||
35 | #define CLK_VDE 17 | ||
36 | |||
37 | /* peripheral device clock */ | ||
38 | #define CLK_TIMER 18 | ||
39 | #define CLK_I2C0 19 | ||
40 | #define CLK_I2C1 20 | ||
41 | #define CLK_I2C2 21 | ||
42 | #define CLK_I2C3 22 | ||
43 | #define CLK_PWM0 23 | ||
44 | #define CLK_PWM1 24 | ||
45 | #define CLK_PWM2 25 | ||
46 | #define CLK_PWM3 26 | ||
47 | #define CLK_PWM4 27 | ||
48 | #define CLK_PWM5 28 | ||
49 | #define CLK_SD0 29 | ||
50 | #define CLK_SD1 30 | ||
51 | #define CLK_SD2 31 | ||
52 | #define CLK_SENSOR0 32 | ||
53 | #define CLK_SENSOR1 33 | ||
54 | #define CLK_SPI0 34 | ||
55 | #define CLK_SPI1 35 | ||
56 | #define CLK_SPI2 36 | ||
57 | #define CLK_SPI3 37 | ||
58 | #define CLK_UART0 38 | ||
59 | #define CLK_UART1 39 | ||
60 | #define CLK_UART2 40 | ||
61 | #define CLK_UART3 41 | ||
62 | #define CLK_UART4 42 | ||
63 | #define CLK_UART5 43 | ||
64 | #define CLK_UART6 44 | ||
65 | #define CLK_DE1 45 | ||
66 | #define CLK_DE2 46 | ||
67 | #define CLK_I2SRX 47 | ||
68 | #define CLK_I2STX 48 | ||
69 | #define CLK_HDMI_AUDIO 49 | ||
70 | #define CLK_HDMI 50 | ||
71 | #define CLK_SPDIF 51 | ||
72 | #define CLK_NAND 52 | ||
73 | #define CLK_ECC 53 | ||
74 | #define CLK_RMII_REF 54 | ||
75 | |||
76 | #define CLK_NR_CLKS (CLK_RMII_REF + 1) | ||
77 | |||
78 | #endif /* __DT_BINDINGS_CLOCK_S500_CMU_H */ | ||