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-rw-r--r--copy_experiments/mon_cross_ctx_copies.cu19
1 files changed, 12 insertions, 7 deletions
diff --git a/copy_experiments/mon_cross_ctx_copies.cu b/copy_experiments/mon_cross_ctx_copies.cu
index 65ccd4e..dfccdfc 100644
--- a/copy_experiments/mon_cross_ctx_copies.cu
+++ b/copy_experiments/mon_cross_ctx_copies.cu
@@ -88,6 +88,7 @@ void* copy_thread(void* args_raw) {
88 int dev, i; 88 int dev, i;
89 cudaError_t err; 89 cudaError_t err;
90 int *barrier; 90 int *barrier;
91 int *barrier_dev_ptr; // On Pascal+ this will be the same as *barrier
91 char *pinned_hostmem, *devmem; 92 char *pinned_hostmem, *devmem;
92 uint64_t *devtimes, *times; 93 uint64_t *devtimes, *times;
93 cudaStream_t stream1, stream2; 94 cudaStream_t stream1, stream2;
@@ -114,9 +115,10 @@ void* copy_thread(void* args_raw) {
114 if (GPU_COMPUTE) { 115 if (GPU_COMPUTE) {
115 SAFE(cudaHostAlloc(&barrier, sizeof(int) * GPU_MON_THREADS, cudaHostAllocMapped)); 116 SAFE(cudaHostAlloc(&barrier, sizeof(int) * GPU_MON_THREADS, cudaHostAllocMapped));
116 SAFE(cudaMemset(barrier, 0, sizeof(int) * GPU_MON_THREADS)); 117 SAFE(cudaMemset(barrier, 0, sizeof(int) * GPU_MON_THREADS));
118 SAFE(cudaHostGetDevicePointer(&barrier_dev_ptr, barrier, 0));
117 } 119 }
118 120
119 SAFE(cudaMallocHost(&pinned_hostmem, COPY_SIZE)); 121 SAFE(cudaHostAlloc(&pinned_hostmem, COPY_SIZE, cudaHostAllocDefault));
120 for (i = 0; i < COPY_SIZE; i++) 122 for (i = 0; i < COPY_SIZE; i++)
121 // Don't allow 0 so that the copy detection logic works 123 // Don't allow 0 so that the copy detection logic works
122 pinned_hostmem[i] = max((rand() & 0xff), 1); 124 pinned_hostmem[i] = max((rand() & 0xff), 1);
@@ -132,7 +134,7 @@ void* copy_thread(void* args_raw) {
132 134
133 if (GPU_COMPUTE) { 135 if (GPU_COMPUTE) {
134 // 1 thread can't go quick enough, even on the GV100 136 // 1 thread can't go quick enough, even on the GV100
135 watch_devmem<<<1,GPU_MON_THREADS,0,stream2>>>(devmem, COPY_SIZE, devtimes, barrier); 137 watch_devmem<<<1,GPU_MON_THREADS,0,stream2>>>(devmem, COPY_SIZE, devtimes, barrier_dev_ptr);
136 // Wait for monitor(s) to initialize 138 // Wait for monitor(s) to initialize
137 bool ready = false; 139 bool ready = false;
138 while (!ready) { 140 while (!ready) {
@@ -249,11 +251,13 @@ int main(int argc, char**argv) {
249 // Due to some laziness in how we handle barriers, this flag needs to be true 251 // Due to some laziness in how we handle barriers, this flag needs to be true
250 /// XXX: Still seems to work fine if it isn't??? 252 /// XXX: Still seems to work fine if it isn't???
251 cudaGetDevice(&dev); 253 cudaGetDevice(&dev);
252 cudaDeviceGetAttribute(&tmp, cudaDevAttrCanUseHostPointerForRegisteredMem, dev); 254 cudaDeviceGetAttribute(&tmp, cudaDevAttrCanMapHostMemory, dev);
253 /*if (!tmp) { 255 if (!tmp) {
254 fprintf(stderr, "Unsupported platform. Exiting...\n"); 256 fprintf(stderr, "Unsupported platform. It must be possible to map host (CPU)"
255 exit(1); 257 "DRAM into the GPU virtual address space for accurate clock"
256 }*/ 258 "synchronization. Exiting...\n");
259 return 1;
260 }
257 261
258 struct argp argp = {opts, arg_parser, 0, desc}; 262 struct argp argp = {opts, arg_parser, 0, desc};
259 argp_parse(&argp, argc, argv, 0, 0, &g_args); 263 argp_parse(&argp, argc, argv, 0, 0, &g_args);
@@ -272,6 +276,7 @@ int main(int argc, char**argv) {
272 InternalReadGPUNanoseconds(dev, &host_s, &dev_ns); 276 InternalReadGPUNanoseconds(dev, &host_s, &dev_ns);
273 GPU_TIME_OFFSET = dev_ns - s2ns(host_s); 277 GPU_TIME_OFFSET = dev_ns - s2ns(host_s);
274 278
279 // Copy buffers are filled with random numbers. Seed the RNG.
275 srand(0); 280 srand(0);
276 // Spawn and wait for children to intialize 281 // Spawn and wait for children to intialize
277 for (int tid = 0; tid < g_args.num_threads; tid++) { 282 for (int tid = 0; tid < g_args.num_threads; tid++) {